As a conventional technique, stage control of a stage which moves a wafer or reticle in a semiconductor exposure apparatus (to be referred to in abbreviated form as an exposure apparatus hereinafter) will be exemplified.
Performance characteristics required for the stage of a semiconductor exposure apparatus are:
1. quick response (responsiveness);
2. stability; and
3. good control accuracy (steady state error).
In stage control, PID compensation is used to improve these performance characteristics. Along with a recent decrease in exposure line width, an exposure apparatus stage is required to have position control accuracy on the order of several nanometers. For the purpose of increasing the productivity, the stage moving acceleration and velocity are increasing year by year.
To realize high speed, high precision position control, a wafer stage position control system needs to have a high servo band. For this reason, analog control using an analog device such as an operational amplifier is being replaced by digital control using a microprocessor which performs high speed digital signal processing typified by DSP. Many exposure apparatuses adopt this method.
An example of a control system of an exposure apparatus which performs conventional digital control using a microprocessor will be described with reference to FIG. 11.
FIG. 11 is a diagram for explaining the control system of a conventional exposure apparatus.
For the sake of descriptive simplicity, the controller of a single stage will be described here. The basic arrangement of the control system of each of various stages (e.g., a wafer stage, reticle stage, and the like) in the exposure apparatus is not different from that of this example.
Reference numeral 11 denotes a stage to be position controlled in the exposure apparatus. A position measurement unit 13 measures a position signal y(t) of the stage 11. The position signal y(t) is converted by an A/D converter 19 to a digital signal y(n).
Reference symbol t denotes time; and n, the sample number. That is, the position signal y(t) is a position signal at time t. The digital signal y(n) is a digital signal whose sample number is n.
A control command value (control signal) u(n) is calculated within a microprocessor 18. The control signal u(n) is converted by a D/A converter 15 to a continuous time signal u(t) and is amplified by a current amplifier 12 to a signal i(t). With the signal, a linear motor 11a drives the stage 11.
The position of the stage 11 thus controlled is measured again by the position measurement unit 13. A similar control operation is repeated, and the stage 11 reaches a position target value.
In the microprocessor 18, the following calculation processes are performed.
1. An adder 903 calculates an error signal ep(n), which is a difference between the digital signal y(n) and a position target value rp(n) generated by a position target value generator 17a. 
2. A difference operation unit 16b calculates an error difference signal ed(n) of the error signals ep(n).
3. A sum operation unit 16a calculates an error sum signal ei(n) of the error signals ep(n).
4. The product of the error signal ep(n) and a proportional gain 14a, the product of the error sum signal ei(n) and an integral gain 14b, and the product of the error difference signal ed(n) and a derivative gain 14c, are calculated. An adder 902 calculates the sum of the products as the control signal u(n). These calculation processes are performed for every predetermined sampling period.
Note that the error difference signal ed(n) specifically means an error signal difference obtained by the immediately preceding sampling, i.e., ed(n)=ep(n)−ep(n−1).
As described above, the microprocessor 18, which calculates the control signal u(n), conventionally operates at a single sampling frequency.
One of the factors which lowers the control band in an alignment apparatus having a digital alignment compensator is a delay time which may appear in an error difference signal due to a difference operation of error signals. As the delay time becomes longer, the control band becomes lower, and the alignment precision decreases.
A delay time caused by a difference operation depends on the sampling frequency at which a difference operation is performed. The delay time becomes longer with a decrease in sampling frequency.
The frequency characteristic of a difference operation will be described with reference to FIG. 12.
FIG. 12 shows graphs of the frequency characteristics of a difference operation at sampling frequencies of 10 kHz and 40 MHz.
The upper half of FIG. 12 is a level graph showing the relationship between the sampling frequency and its frequency level while the lower half is a phase graph showing the relationship between the sampling frequency and the phase.
In the lower phase graph, a solid line A indicates a case of the sampling frequency of 10 kHz while a dotted line B indicates a case of the sampling frequency of 40 MHz.
In an ideal difference operation in which the sampling frequency is infinite, the phase remains 90° even if the frequency infinitely increases. However, as seen from the phase graph, a delay increases with a decrease in sampling frequency. The delay at the sampling frequency of 10 kHz is larger than that at the sampling frequency of 40 MHz. The phase is delayed more at the sampling frequency of 10 kHz.
A PID compensator outputs the sum of an error signal, error sum signal, and error difference signal as a control signal. If the error difference signal suffers a delay, the control signal output from the PID compensator suffers a delay.
The frequency characteristic of the PID compensator will be described with reference to FIG. 13.
FIG. 13 shows graphs of the frequency characteristics of the PID compensator at the sampling frequencies of 10 kHz and 40 MHz.
The upper half of FIG. 13 is a level graph showing the relationship between the sampling frequency and its frequency level while the lower half is a phase graph showing the relationship between the sampling frequency and the phase.
In the lower phase graph, a solid line A indicates a case of the sampling frequency of 10 kHz, and a dotted line B indicates a case of the sampling frequency of 40 MHz. According to the phase graph, a signal output from the PID compensator is delayed more at the sampling frequency of 10 kHz. This delay decreases a phase margin.
The open-loop transfer characteristics when a digital alignment compensator controls, at the sampling frequencies of 10 kHz and 40 MHz, an object to be controlled two-dimensionally, i.e., in the X and Y directions (or three-dimensionally, i.e., in the X, Y, and Z directions), such as an exposure apparatus stage, will be described with reference to FIG. 14.
FIG. 14 shows graphs of the frequency characteristics of the open loop transfer function in the alignment compensator at the sampling frequencies of 10 kHz and 40 MHz.
The upper half of FIG. 14 is a level graph showing the relationship between the sampling frequency and its gain level while the lower half is a phase graph showing the relationship between the sampling frequency and the phase.
In the lower phase graph, a solid line A indicates a case of the sampling frequency of 10 kHz, and a dotted line B indicates a case of the sampling frequency of 40 MHz.
As for the alignment compensator phases at sampling frequencies whose gains are below 0 [dB] (zero-crossing frequency), there is hardly any phase margin at the sampling frequency of 10 kHz, while there is a sufficient phase margin at the sampling frequency of 40 MHz. When this phase margin decreases, the control system becomes unstable, and the alignment precision decreases. To increase the control performance, the sampling frequency must be increased as much as possible.
Under the circumstances, in, e.g., a phase compensator for a servo circuit disclosed in Japanese Patent Laid-Open No. 06-165552, only a difference operation is performed by an analog differentiating circuit, thereby suppressing any delay time. The derivative compensation with this arrangement feeds back not the derivative value of a position error signal, but the derivative value of a position signal and does not compensate for any PID for an error in the position signal. In this arrangement, an analog circuit is used for a differential operation. A differential signal thus obtained may contain a noise component, which may decrease the alignment precision.
As described above, in a conventional technique, a microprocessor which calculates control signals operates at a single sampling frequency. For this reason, to increase the sampling frequency, a microprocessor with higher processing power is necessary.
However, a microprocessor with high processing power is expensive, and the product cost increases.
Additionally, only a difference operation needs to be performed at a high sampling frequency, and the sampling frequencies for other processes need not be high.